1. Field of the Invention
Embodiments of the invention relate to semiconductor memory devices. More particularly, embodiments of the invention relate to flash memory devices.
This application claims the benefit of Korean Patent Application No. 10-2005-77480 filed on Aug. 23, 2005, the subject matter of which is hereby incorporated by reference in its entirety.
2. Discussion of Related Art
FIGS. (FIGS.) 1 through 3 illustrate a layout structure for a conventional flash memory device.
The conventional flash memory device generally includes three regions; a core region, a peripheral control region, and a high-voltage pump region. The overall layout structure of the flash memory device depends largely on the nature of the core region since the area occupied by the core region is large relative to the peripheral control region and the high-voltage pump region (i.e., the non-core regions).
A memory cell array, a row decoder circuit, a column decoder circuit, and a sense amplifier circuit are disposed in the peripheral control region. Connection pads, input/output circuitry, control logic, a predecoder circuit, and other circuit may also be disposed in the peripheral control region. High-voltage pump circuits adapted to generate various voltages associated with program, erase, and read functions are disposed in the high-voltage pump region.
These three principle regions may be variously laid out on a semiconductor die. For example, the peripheral control and high-voltage pump regions may be sequentially disposed to one side of the core region as shown in FIG. 1. Alternatively, the peripheral control and high-voltage pump regions may be disposed on opposite sides of the core region as shown in FIG. 2. Alternatively, the peripheral control region may be disposed “vertically” above or below the core region while the high-voltage pump region is disposed “laterally” to either side of the core region as shown in FIG. 3. In this context, the terms “vertical” and “lateral” have relative meanings ascribed to an assumed orientation of the core region. As such, these terms are merely used to define relative positions for the various regions in relation to one another and the core region.
As illustrated in the examples shown in FIGS. 1 through 3, the layout structure of conventional flash memory devices depends entirely on the disposition of the rectangular core region. Thus, the peripheral control region also assumes a rectangular shape. However, several problems arise when a peripheral control region is disposed in a rectangular shape. Above all, signal transfer lines disposed in a rectangular shaped peripheral control region are necessarily extended because of the shape of the peripheral control region. As signal transfer lines are extended, signal delay occurs.
In practice, the layout structure of the peripheral control region should be dictated by the layout of its constituent signal transfer lines, not by the shape and layout disposition of other die regions. However, this has not been the case conventionally, and layout efficiency of the peripheral control region has suffered accordingly.